Full Adder Circuit using Ultra Low Power Design

Abstract

 In many applications where there are a certain set of factors in which they play a major role in the overall development of the device. In the field of electronics, particularly in the field of VLSI, the integration of several devices like transistors and other CMOS circuits can be integrated on a single chip by considering all the required features to get a low power device. There are several techniques for the low power design of logic circuits; adiabatic logic technique is one of the best. The main theme of adiabatic logic is to reuse the energy like thermodynamic processes. The power dissipation and delay factors are very less compared to the designs using CMOS technology. By designing this type of circuit, we can use it in many of the applications where we specially require low power circuits including decoders, multiplexers, encoders and other logical circuits. By considering a circuit, like full adder (includes sum and carry) which is one of the most commonly used circuits in many applications, can be designed by using various adiabatic logic techniques and can be compared by considering various parameters and other non-adiabatic logics.