Local and Global Spares for Repair of Multiblock Memories

Abstract

As the memory capacity is increasing day by day, many semiconductor manufacturing units are improving the memory dice for a larger capacities. As there is a higher chance of fault occurrence with an increase in the memory capacity, there is an uttermost need for the built-in redundancy analysis (BIRA). A conventional spare structure approach that contains simple rows and columns is insufficient for a BIRA with more than two memory blocks as the efficiency of spare allocation and hardware overhead are often deteriorated. The BIRA proposed uses different types of spare structures and can attain a higher efficiency than a conventional one. Therefore, we suggest a BIRA that can attain an optimal repair rate using different types of spares. The proposed analyzer can comprehensively search both the global spare and the local spare types. The experimental outcomes exhibit an enhanced repair rate with a minimal hardware overhead and a short analysis time.