Comparitive Analysis of Shift Register Designs For Successive Approximation Analog To Digital Converters

Abstract

A sensor is a device which is used to detect the changes that occur in the environment and then gives the corresponding output (mostly in the form of electrical signals). The block diagram of analog sensor consists of signal conditioner, Analog to Digital Converter (ADC), amplifiers, etc. The conversion of analog to digital signal is highly essential for processing the sensed physical quantity. The most commonly used ADC is Successive Approximation Register (SAR) based ADC because of its less power consumption and simple design. The most important block SAR ADC is shift register. Hence, in this work, a optimized shift register for SAR ADC is proposed. This focus of this work is to optimize the design of shift register using pulsed latches than the flip flops as in conventional SAR ADC. The experimental result shows that the proposed shift register achieves 65.49% less power consumption, 59.87% faster and 56.25% less area compared to conventional design.