Performance Analysis of Adiabatic Technique Using Logical Gate for Efficient Power Dissipation

  • Chanchala Seshasayana Reddy, Cherukuri Abhinava Deepak, Kankanampati Manisha

Abstract

Adiabatic circuits are low power circuits, which manage reversible rationale that it stores the power and gives it back once more. At present Several Adiabatic strategies have been received for effective power dissemination. The strategy used to limit control dispersal is Efficient Charge Recovery Logic, Positive Feedback Adiabatic Logic, and Pass Transistor Logic. The Adiabatic strategy is for the most part utilized for diminishing the power dispersal in VLSI circuits which performs charging and releasing procedure. The rationale entryways assume a significantjobinnumerousnumber-crunchingtasks,forexample,thesnake,multiplieranddivider and processors. So as to confine the power dissemination, a productive full viper is intended for the distinctive adiabatic procedures and every one of the circuits have been mimicked by 25nm innovation using tanner EDAtool.

Published
2020-03-30
How to Cite
Chanchala Seshasayana Reddy, Cherukuri Abhinava Deepak, Kankanampati Manisha. (2020). Performance Analysis of Adiabatic Technique Using Logical Gate for Efficient Power Dissipation. International Journal of Advanced Science and Technology, 29(3), 10188 - 10195. Retrieved from https://sersc.org/journals/index.php/IJAST/article/view/27076
Section
Articles