Design of Memristor Based Full Adder Circuits

  • Shahzad Mobeen, Dr. Kureshi A. K, Rumaisa Uzma, Javeriya Kauser, Shabnam Bano

Abstract

Memristor technology is regarded as a potential solution to the memory bottleneck in Von Neumann Architecture by putting storage and computation integrated in the same physical location. In this paper, a review on various memristor logics, models and full adder circuit is discussed. Various memristor logics which have discussed are lMPLY logic, memristor ratioed logic, memristor aided logic, voltage controlled memristor threshold logic, standard ternary Inverter logic and various models are Linear ion drift model, Non-linear ion drift model, Simmons Tunnel Barrier Model, TEAM model and VTEAM Model. Out of all these VTEM model has best performance. Similarly, out of various memristor based full adders, Hybrid CMOS Memristor Based Full adder gives Delay, Area, No. of Steps, No. of Memristor parameters which is simulated using LTSPICE software

Published
2020-06-04
How to Cite
Shahzad Mobeen, Dr. Kureshi A. K, Rumaisa Uzma, Javeriya Kauser, Shabnam Bano. (2020). Design of Memristor Based Full Adder Circuits. International Journal of Advanced Science and Technology, 29(9s), 7915-7925. Retrieved from https://sersc.org/journals/index.php/IJAST/article/view/24676