DUAL PHASE COMPACT REFERENCE DESIGN FOR TELECOMMUNICATIONS

Abstract

This reference design uses two IC’s in stacked configuration to provide compact form factor. It
uses both a low ESR polymer output capacitor version and all ceramic output capacitor version
which is demonstrated to meet the requirement for providing lower undershoot that is less than
three percentage. This design process is simplified by an internal compensation and this design
includes onboard highspeed dynamic load tester, output ripple probe interface and test points for
stability analyzer. This the ultimate aim of the project is to design a compact printed circuit board
by using mentor graphics xpedition tool in which more number of components is used hence size is
minimized. The ceramic capacitor version and low ESR polymer output capacitor version are used
to get accurate design.