Study on Power Management Strategies in VLSI Network

Abstract

The production of VLSI systems requires the usage of CMOS technology because of its low power consumption. Power optimisation in deep submicron CMOS technologies has been an overriding concern. In today's manufacturing landscape, low power has been the dominant trend. Power dissipation has developed to be an incredibly important field for VLSI Chip efficiency. Due to a decreasing system scale, the major problems are power usage reductions and over all energy control on the processor. For the control of the power leakage current, VLSI designs often play an important function. Leakage is a growing fraction of the overall dissipation of power in the integrated circuits. This article discusses the different techniques, methodologies and technologies for the control of low power circuits and systems.