Silicon Wafer Fault Detection by Using Multiple Data Prediction

Abstract

The process monitoring and profile analysis are critical in detecting various abnormal events in semiconductor manufacturing, which consists of highly complex, interrelated, and lengthy wafer fabrication processes for yield enhancement and quality control. This study aims to develop a framework for semiconductor faults detection and classification (FDC) to monitor and analyze wafer fabrication profile data from a large number of related process variables to remove the cause of the faults and thus reduce abnormal yield loss. Multi-way principal component analysis and data mining are used to construct the model to detect faults and to extract the rules for fault classification. An empirical study was conducted in a leading semiconductor company to validate the model. The proposed framework can effectively detect abnormal wafers based on a controlled limit and the derived simple rules. The extracted information can be used to assist semiconductor faults diagnosis process recovery. The results demonstrate the practical applicability of the proposed approach.