Turbo Decoder for LTE High Speed band Efficient Architecture

  • Rashmi R et al.

Abstract

The evolution of wireless communications for the next generation is well beyond 3 Gbps of wireless
communication standards. Hence, reliable data communication is possible because of Wireless
communication system. Turbo codes that is used by the Channel decoder delivers good bit rate
performance and also performs error-correction, making the code widely acceptable by numerous
wireless communication standard. Wireless communication that is 3G and 4G includes turbo codes
within it for accurate error correction. The turbo decoder is restricted by the inherent iterative process
to compile the data at a higher rate. Bit error rate (BER) is calculated depending on the size of the
frame and the interleaver type that is required in the implementation of encoder and decoder. A coding
loss of around 0.2 dB is exhibited by the decoder while comparing BER performance with simulated
BER values. High decoding latency is the major flaw of Turbo coding implementation. The three major
obstacles faced in turbo coding architecture are: The forward recursions or recursions occurring
backward in maximum a posteriori (MAP) decoder, the repetitive nature of the decoding algorithm and
interleaver or de-interleaver units between the MAP decoders. The above-mentioned obstacles are of
utmost importance when we integrate the codes written using turbo coding in a communication
standard of throughput which is high like LTE. To predict latency reduction and parallelization methods
in the implementation of hardware components of Turbo decoder, we fulfill the data rates mentioned
above. A serial data dependency imposed is the problem of decoding a received signal. The severe
bottleneck is created conventional turbo decoder by the limited processing throughput of the.

Published
2020-02-16
Section
Articles