Design of Novel PMOS and NMOS for High Speed Applications

Abstract

This paper sews Novel PMOS and NMOS for high-speed applications, standard PMOS and NMOS combined called CMOS have been the dominant technology for the past decade, using the concept of pre-existing bias threshold voltage can be reduced when speed can be reached there. improvement and delays are reduced. The product of the power delay is a statistical value of any digital design .in this paper novel PMOS and NMOS novel are combined together it is called a novel inverter is designed and the transmitted components are researched by 180nm technology