A New Approach for Implementing High Performance Capacity Achieving Codes For Wireless Communication Applications: Polar Codes.
An emerging error-detection and correcting technique developed in the recent years is Polar codes. The technique does not focus on randomization of the bits like other techniques does, but is based on the Shannon theory and channel polarization. This paper presents a successive cancellation (SC) algorithm based FPGA implementation of Polar codes. The implementation focuses on low complexity decoder for high speed applications. Simulation results show that the performance of polar codes can outperform that of turbo or LDPC codes.