1.
Nadendla Bhargava Sai , Venna Venkat Kumar, Cheruvu Krishna Chaitanya, Ngangbam Phalguni Singh. 2-bit Vedic Multiplier Design Using Urdhva-Tiryagbhyam and Modified-Gate Diffusion Input Technique. IJAST [Internet]. 2020May20 [cited 2024May6];29(06):5840 -5848. Available from: http://sersc.org/journals/index.php/IJAST/article/view/19863