Dr. Khaja Mujeebuddin Quadry, D Chandrasekhar Nayak, Munyanaik Kethavath, Lavudi Srilatha. “Improved Performance Memory Module Using Verilog HDL”. International Journal of Advanced Science and Technology 29, no. 5s (April 4, 2020): 919 - 927. Accessed December 7, 2024. http://sersc.org/journals/index.php/IJAST/article/view/7805.