A. Narasimha Reddy, Y. Prasad,. “TIMING ERROR AVOIDANCE TECHNIQUE USING TIMING CHECKER FLIP-FLOP UNIT FOR HIGH PERFORMANCE DESIGNS”. International Journal of Advanced Science and Technology 29, no. 3s (March 11, 2020): 1687 - 1692. Accessed May 1, 2026. http://sersc.org/journals/index.php/IJAST/article/view/6228.