Mr. Manjunath K. M, Dr. K. N. Muralidhara, Dr. H. V. Ravish Aradhya. “Binary Multiplier (n-Bit Size) Design, Implementation, Analysis and Comparison of Various Logics”. International Journal of Advanced Science and Technology 29, no. 7 (June 1, 2020): 8206-8223. Accessed May 2, 2024. http://sersc.org/journals/index.php/IJAST/article/view/24645.