et. al, R. K. A. (2020) “EFFICIENT PERFORMANCE MODELLING AND IMPLEMENTING LPDIR AND DIR SADC MEMORY CONTROLLER USING VERILOG.”, International Journal of Advanced Science and Technology, 29(2), pp. 2334 - 2347. Available at: http://sersc.org/journals/index.php/IJAST/article/view/3656 (Accessed: 26April2024).