FPGA Based Multi-Level Image Thresholding using Neural Network Optimization Algorithm - Diksha Thakur, Nitin Mittal ,Saumya Srivastava (International Journal of Advanced Science and Technology, 2020)
This paper represents an effort to create segmentation of images using FPGA.The EDK code basedon Xilinx platform is built on the FPGA Vertex 7 and images segmentation is considered one of themost essential processes in the production of images.Matlab based software is used to transform theimage into the bit stream array that will be used as the Xilinx device studio header format. In thepresent situation image processing is one of the huge developing fields. It is a strategy which isordinarily used to improve raw image which are collected from different assets. It is a sort of signprocessing. Many of these strategies use only the histogram of the gray scale, while others useanalytical solutions of the Fuzzy set. In noisy environments these methods are not appropriate. Thispaper gives an outline of image processing techniques.The experimental results showed that theFPGA has taken less time to segment the image segmentation than MATLAB. MATLAB, Simulink andXSG merge in this architecture. XSG is used to implement the hardware design, while the softwarecomponent is built using Matlab.