@article{Nalini.D , Pradeep Kumar.P , Ramesh.M ,Sundar Ganesh C.S_2020, title={Implementation of 16 bit ALU with three different multiplier algorithms and power optimization technique using Xilinx Power Estimator}, volume={29}, url={http://sersc.org/journals/index.php/IJAST/article/view/11042}, abstractNote={<p><span class="fontstyle0">ALU is a key component in any data processing units like real time embedded systems, digital signal<br>processing units, etc,. The complex and time consuming part of an ALU is the multiplier unit. The main<br>restrictions of such a multiplier is offering -- high speed, low power consumption and fewer silicon area<br>occupation or perhaps a mixture of all these in one multiplier and making it suitable for various high<br>speeds, low power applications. A simple way of multiplication uses both “addition and shift” operations.<br>The key performance of any multiplier is the number of summation circuit required for the addition of<br>partial product, which is the most significant term. Number of partial product terms can be reduced by<br>using Radix-4 algorithm, whereas by using Wallace Tree multiplication methodology one can achieve<br>with deduction in the usage of more number of successive adders for the intermediate product result<br>summation and which improves the speed of operation. Reduced speed, increased silicon area for the<br>implementation will happen sometimes as a result of increase in parallelism , and the quantity of<br>shifts between the intermediate products will also get increase, which finally ends with more power<br>requirement for its operation resulting from complex routing . In this paper three different the<br>multiplication algorithms in a 16-bit ALU are implemented using VHDL code and their parameters like<br>speed, area, power or the combination of these metrics were measured.</span> </p>}, number={6s}, journal={International Journal of Advanced Science and Technology}, author={Nalini.D , Pradeep Kumar.P , Ramesh.M ,Sundar Ganesh C.S}, year={2020}, month={Apr.}, pages={2262-2268} }