Power Efficient Accuracy Trade off Multiplier for Approximate Computing System

Abstract

Multiplier is the key arithmetic circuit in many accuracy trades off image processing applications. This article presents the accuracy trade off multiplier with reduced power consumption and area by removing few parts of the partial product generating path in LSB. The proposed accuracy trade off multiplier design is to trade a less significant quantity of accuracy with lowered power consumption and efficient use of energy. The proposed accuracy trade off multiplier has a very low absolute mean error as compared to other usual multiplier. The proposed accuracy trade off multiplier achieves similar valuable processing accuracy as traditional accurate multipliers, but with significant improvements in power metric and performance metric.