POWER AND AREA EFFICIENT ARITHMETIC AND LOGIC UNIT USING MAJORITY LOGIC FORMULATIONS

Abstract

The New Technology is quantum dot cellular automata was deceloped at Nanoscale level, which required less area by utilizing quantum cells compared to CMOS technology thus it consumes low power. The CMOS based Transistors can reduce their channel width at only certain levels than their present size .The QCA approach tends to one of the best arrangements in beating this physical width and channel width at molecular level. We can perform any Digital Logic Function, with the avail of QCA based majority gates. In this paper fast adders like Ripple carry adders(RCA) Ripple carry subtractors and Array multipliers of N-bit size operations are performed by utilizing Majority gates that has all best in class contenders and accomplishes the best area-delay tradeoff, delay (speed), power utilization and PDP.