Analysis of Adaptive noise cancellation filter using Steepest Descent algorithm on FPGA

Abstract

 Computer and Internet developments have created requirement for robust, high-speed data handling. The standard techniques for matrix multiplication are not appropriate to achieve the perfect solution in such a complicated setting. Parallel computing is suggested to manage the above-mentioned problem as an alternative to the contradiction.  This paper uses a Field Programmable Gate Array (FPGA) adaptive noise removal filter. Due to its computing ease, good conduct when deployed in hardware with finite precision and well-understood convergence behavior, the filter is intended with the least mean square (LMS). An estimation of the derivative of MSE function, which could include statistical calculations of a block of data, still requires the application of the steepest descent algorithm.