Gate Oxide overlapped Heterojunction Tunneling Transistor based Low Power SRAM Cell Topologies

Abstract

The low voltage operation is one of the best techniques for ultra-low power portable, embedded mobile systems. This can be obtained by scaling of the devices in CMOS technology. But, it is very difficult to operate the system below a certain operating voltage due limited subthreshold swing of MOSFET which is not less than 60mV/decade. The ultra-low power battery powered portable systems need better replacement for MOS device.
One of the best alternatives for this problem is to replace the transistor itself with a reduced subthreshold swing device such as heterojunction transistor called HETTs (Heterojunction Tunnel Transistors. High ON state current, Lower subthreshold swing, Improved Miller capacitance, low leakage current and lower power consumption are the advantages of HETT over MOSFET.Low voltage operation and scaling of the transistor is also possible. Low bandgap material based HETTs are best choice of portable systems memories.
In this paper, low bandgap material based NHETT and PHETT are designed, implemented and fabricated. Using these HETTs, different SRAM configurations such as 6T, 7T and 8T SRAM cells designed and implemented. The power and delay of these designs are obtained and validated with MOSFETs.The physical and electrical differences between MOSFET and HETT are elaborated in detail.