An Energetically Efficient Versatile Estimated Multiplier Centered on Truncation and Rounding

Abstract

A scalable approximate multiplier, the TOSAM, is presented which reduces the number of partial products by truncing the each input operand based on its leading one-bit location. This is called a twisted and circumventable scalable approximate multiplier. The proposed architecture would multiply by flipping, combining, and minor multiplication operations of set width, which will result in large changes in the consumption of resources and occupation of area in relation to the exact multiplier. In order to increase the overall precision, multiplication component input operators are rounded to the next deficiency. As the input operands are truncated according to their leading one-bit positions, the precision is weakly dependent on the width of the input operands. More changes can be made as input operand width increases in architecture parameters (e.g. area and energy consumption). The parameters of the specification are contrasted to exactly one multiplier and several others to test the utility of the proposed estimated multiplier approximate multipliers recently suggested. Results show that the proposed estimated multiplier with an absolute average error in the range of 11%–0,3% increases lateness, area and energy efficiency by up to 41%, 90% and 98%, respectively, as compared to that of the exact multiplier. In terms of speed, area and energy consumption it also outputs other estimated multipliers. The estimated multiplier suggested is approximately Gaussian with an average value of close to zero. We use it in the composition, sharpening and classification applications of a JPEG encoder. The outcome indicates a negligible decline in the efficiency of the production. Furthermore we propose the TOSAM accuracy, which can be modified to the minimum necessary accuracy in relation to energy consumption of the multiplication operation.