Low Area And Energy-Efficient Inexact Multipliers By Using Ahhr Encoding

Abstract

Approximate computing forms a design alternative that exploits the intrinsic error resilience of various applications and produces energy-efficient circuits with small accuracy loss. The approximate hybrid high radix (AHHR) encoding is generated in the partial products in signed multiplications that encode the most significant bits with the accurate radix-4 encoding and the least significant bits with an approximate higher radix encoding. The approximations are performed by rounding the high radix values to their nearest power of two. The approximate encoding is commonly used in signed multipliers although these techniques perform fast multiplications. The number of the partial products is reduced in the design. In radix-4 encoder the partial product tree is reduced and the number of radix increases. The MSBs of the multiplicand are encoded with the accurate radix-4 encoding, while its k LSBs are encoded with an approximate high radix-2 k encoding, with k being a configuration parameter that adjusts the trade-off between accuracy and energy consumption. Compared with accurate radix-4 16-bit multiplier (ACCR4) the proposed design approximate multiplier (RAD64) have achieved the area reduction. Further, efficient three tap filter is designed with three coefficients and three inputs array using modified booth encoding algorithm.