Optimization of Single Ended SRAM with Dynamic Feedback Control using GNRFET

Abstract

Random-access memory (RAM) is a kind of PC or IC information storage commonly used for storing run time variables and instructions in microcontroller and processing units. A random-access memory gadget permits information things to be perused or written in nearly a similar measure of time regardless of the physical area of information inside the memory. There are two types in this category- Static and Dynamic type of RAM. Mainly, all memory cells have a requirement of being low power, high speed and should give higher efficiency. In this paper, s special type of SRAM which consists of a Dynamic Feedback Control technique is implemented on Simulation platform of HSPICE tool. the SRAM is analyzed and improved using GNRFET technology in 22nm channel length. Also, a new kind of power gating is introduced with adding of a GNRFET transistor in power path so as to increase the performance of the SRAM design in Dynamic Feedback Control. The proposed circuit improves the power by 71%. Delay, Power Delay Product and Leakage Current is improved by 99%. Also, the power dissipation of the circuit is improved by 28%.