Design and Analysis of Low Power Voltage Controlled Ring Oscillator for Phase Locked Loop

Abstract

This paper represents about designing and analyzing a three stage Voltage Controlled Ring Oscillator (VCO) using 180 nm CMOS technology. This circuit oscillates and generates an extensive tuning series of operating frequencies with very low power, which is very much useful for phase-locked loop (PLL). It is one of the main parts in electronic systems, and in general, these are used in communication purpose. Ring VCO which contains an odd numeral of stages and feedback from the o/p to first stage of the circuit and also ring VCOs are used for both analog and digital communications. The major advantage is, it will oscillate without any i/p and results with wide range frequencies and used in many modern applications like generating radio waves etc. In this paper, the low power delay cell has been proposed and calculated the oscillation frequency, power consumption, current including maximum current passing through the circuit, time period, and delay for 3.3 V supply voltage. Schematic diagram and layouts for proposed delay cell is also included here for validating the results.