A Novel Architecture of 32 bit Modulo 2n-1 Adder

  • Uday J, Rajithkumar B K

Abstract

Addition is a operation in which timing consideration is very important in all modern processing units.There is lot of scope for designing efficient and fast adders. Here a new architecture presented for addition of modulo 2n-1 adder, which allows a highly efficient combinational circuits for modulo 2n-1 adder implementation in Cryptography and network security.

The modulo architectures are implemented on Nexys 4 DDR, A Vertex-7 field-programmable gate array (FPGA) using Vivado design suit. The results of the new architecture is compared with other proposed architecture, it shows that, the new architectures is better in terms of  Look Up Tables, Power utilization  and Slices utilized .

Published
2020-06-01
How to Cite
Uday J, Rajithkumar B K. (2020). A Novel Architecture of 32 bit Modulo 2n-1 Adder. International Journal of Advanced Science and Technology, 29(7), 11321-11326. Retrieved from http://sersc.org/journals/index.php/IJAST/article/view/27557
Section
Articles