Performance Analysis of Low Noise Dynamic Comparator

Abstract

A practical approach to analyze performance metrics of dynamic comparators under different technologies with various supply voltages is proposed. The minimization in power, delay, PDP, and thermal noise for a dynamic comparator can be achieved by miniaturizing technology, supply voltage and load capacitance of a preamplifier carried out by using Mentor Graphics simulation tool. Thermal noise is evaluated with various temperatures at different loads of the preamplifier Likewise, other performance metrics at several loads with various CMOS process evaluates and demonstrate that power, delay is diminished by 50%,10% respectively.

Keywords: Load Capacitance, Thermal noise, Power, Delay, PDP.