A Reconfigurable Design For Single Precision Floating Point FFT/IFFT Computations

Abstract

In many of the signal processing applications, Fast Fourier Transform (FFT) and Inverse Fast Fourier Transform (IFFT) has a predominant role. As the technology node is reducing, there is a need for hardware reconfigurablity with minimum area. This paper presents a reconfigurable FFT/IFFT processor in which FFT and IFFT are computed with same hardware for 16 point 32-bit floating point data. In this architecture, FFT uses single Radix-4 Butterfly (R4BF). 16-point FFT can be computed in two stages. It uses a register bank to store the computed results at each stage.