Design and Implementation of High Speed Parallel Cyclic Redundancy Check-32 Bit Using Verilog

  • Govardhani. Immadi, M. Venkata Narayana, A. Sree Madhuri, D. Bhavya Sree, V. S. Charmila, W. Rachana

Abstract

In the present world, high-speed data transmission plays a major role. Cyclic redundancy check (CRC) is one of the methods for error correcting and detecting method. High speed data must be transmitted. For simulation, we have used Xilinx In the present world high-speed data transmission plays a major role. For simulation, we have used Xilinx Vivado. Binary bits of a message are divided with a fixed binary number, the generated remainder is the checksum that we attach to the message. Cyclic redundancy Check standards are CRC-8,CRC-16,CRC-32,CRC-64.This application identifies all polynomials based on IEEE 802.3 CRC.

 Keywords: Cyclic redundancy check, Xilinx Vivado, CRC, data, highspeed, FCS.

Published
2020-05-30
How to Cite
Govardhani. Immadi, M. Venkata Narayana, A. Sree Madhuri, D. Bhavya Sree, V. S. Charmila, W. Rachana. (2020). Design and Implementation of High Speed Parallel Cyclic Redundancy Check-32 Bit Using Verilog. International Journal of Advanced Science and Technology, 29(05), 9897 - 9903. Retrieved from http://sersc.org/journals/index.php/IJAST/article/view/19468