Accessing Direct Random Memory with Cognitive Radio using Scheduling Mechanism in FPGA Architecture
Abstract
The MAC layer coupled with the intelligence required by the Cognitive radios with a flexible PHY layer. The requirement of the Cognitive radios with a platform which offers and high performance along with highly reconfigurable. The proposed methodology has been designed for memory accessing and software system that has more flexibility which can be associated with the implementation of modern Field Programmable Gate Arrays (FPGAs) in high-level tools. For data storage with the computational system of different operations on the data DRAM plays an important role. Enhanced Reserved timing based scheduling (ERTS) for transmitter and receiver buffering process has been accessed with DRAM.