Study of the Performance of Phase Locked Loop Having Compensated Filter

Abstract

According to modern requirement of communication system, different approach has been taken to design a phase locked loop model having better settling time, phase margin, small damping factor and minimum overshoot. In this work we study the behavior of phase locked loop having compensated filter. Compensated filer is used to achieve a model which can improve the performance and decrease the errors arises due to limited bandwidth. We derive the system transfer function in s-domain and studied the different characteristics of the system, such as: (a) phase margin, (b) Damping factor, (c) settling time, and (d) stability with the help of step, bode and root locus plot in MATLAB platform. The system if found to be stable having minimum settling time 0.00915μs, maximum damping factor is 1 and phase margin is in the range 30.80 to 77.60.

 Keywords: PLL, phase margin, settling time, transfer function, damping factor, gain bandwidth, overshoot.