A VLSI Optimization Technique for General Neural Network Architecture and Deep Learning Network Using XILINX

Abstract

From speech recognition and face recognition to marketing and healthcare, neural networking have been used. Artificial neural network is a functional unit of deep learning. Deep learning uses artificial which mimics the behavior of human brain to solve complex data driven performance. Deep learning is a part of machine learning and Artificial intelligence. Artificial intelligence, machine learning, deep learning are interconnect fields. Machine learning and Deep learning aids Artificial intelligence by providing a set of algorithm and neural network to solve data driven problems. Deep learning makes use of artificial neural network that behave similar to the neural network in our brain. A neural network takes an hour or a month to train, so the time complexity is high. In Deep learning, computer vision is one of the significant applications that have gain lot of curiosity due to their amazing performance. The performance and operation of the convolution neural network has excellence quality but achieve low complexity is complex. In this paper we proposed novel parameter CNN architecture that is particularly used in Image Classification application, which results in collapse of the significant network. This reduction method replacement the convolution layer kernel with small size kernel and it fade the fully connected layers and the last classification layer. The proposed architecture which employ low complexity. We implement the proposed architecture by suitable all trained network parameter on chip using XILINX. The Proposed architecture has less parameter and low Area Delay product enhancement resulting in efficient hardware.